In a typical memory an output driver is not tri-stated during the time that the memory is not providing a valid output. One of the disadvantages of this has been that the output driver will tend to be driven to a predetermined state which is independent of the valid data. When the valid data is of the opposite polarity of the predetermined state, the output driver will often drive first to the predetermined state and then correct to the valid state. This is an unnecessary transition which wastes power and temporarily puts false data on its output. This can be corrected by holding the output driver in the tri-stated condition until the data is valid. This requires extremely accurate timing to avoid adding delay to the access time. As a practical matter such a solution does add to the access time.
Another desirable characteristic is high speed. Capacitive loading has a negative affect on speed and power. Accordingly, any way that capacitive loading can be reduced is generally desirable. Noise immunity can be a consideration. Size of the circuitry is always a consideration. Size of the circuitry is dependent upon not only the number of devices but also the size of the devices themselves. Speed is dependent also upon gain. It is advantageous to have the devices operate in the optimum gain range so that more gain is obtained for given device sizes. Increasing device size to obtain more gain also generally adds more capacitance which is also disadvantageous.
In the past a data driver latched data a predetermined time after the data became valid. The latch, however, adds undesirable capacitance to the line to which the latch is coupled. There are generally two lines on which a differential voltage is developed. This differential voltage is indicative of the data. It is desirable that these two lines have low capacitance. In order to implement the latch there is generally some cross-coupling between the two lines. In the past this cross-coupling drives both P and N channel transistors which are relatively large devices and so add substantial capacitance to the lines.